Free Electronics and Devices MCQs with Answers

• A. III. 1010 + 1101 = 11111
• B. I and II
• C. II and III
• D. III only
• E. II and III

Explanation: 1011 + 1010 = 10101 and 1010 + 1101 = 10111, so statements I and II are correct.

• A. Weighted code
• B. Cyclic redundancy code
• C. Self-complementing code
• D. Algebraic code

Explanation: Excess-3 is formed by adding 3 to each decimal digit and is self-complementing: complementing its four bits gives the Excess-3…

• A. 1 at any input causes the output to be at logic 1
• B. 1 at any input causes the output to be at logic 0
• C. 0 any input causes the output to be at logic 0
• D. 0 at any input causes the output to be at logic 1

Explanation: An OR gate produces 1 whenever at least one input is 1; it produces 0 only when every input is 0.

• A. an astable MV
• B. a bistable MV
• C. a latch
• D. a monostable MV

Explanation: A latch removes switch bounce by storing a stable state while the mechanical contacts make and break repeatedly.

• A. all the inputs to the gates are "1"
• B. all the inputs are '0'
• C. either of the inputs is "1"
• D. all the inputs and outputs are complemented

Explanation: By De Morgan's theorem, complementing both the inputs and the output of an AND operation gives OR: (A'B')' = A + B.

• A. have lower fabrication area
• B. can be used to make any gate
• C. consume least electronic power
• D. provide maximum density in a chip

Explanation: A NAND gate is a universal gate because combinations of NAND gates can implement NOT, AND, OR, and hence any Boolean function.

• A. 6
• B. 32
• C. 64
• D. 128

Explanation: A truth table for n inputs has 2^n possible input combinations, since each input can independently be 0 or 1.

• A. TTLAS
• B. CMOS
• C. ECL
• D. TTLLS

Explanation: ECL uses non-saturating transistor operation, giving it very small switching delays and suitability for frequencies above 100 MHz.

• A. logic 0 and 1 are represented by 0 and positive voltage respectively
• B. logic 0 and, -1 are represented by negative and positive voltages respectively
• C. logic 0 voltage level is higher than logic 1 voltage level
• D. logic 0 voltage level is lower than logic 1 voltage level

Explanation: In positive logic, the higher or more positive voltage level represents logic 1, while the lower level represents logic 0.

• A. 2n
• B. 22 n
• C. 2n-1
• D. - 2n

Explanation: There are 2^n possible input combinations for n variables, and each combination can independently produce either 0 or 1.

• A. 675
• B. 275
• C. 572
• D. 573

Explanation: Group the binary digits from the right in sets of three: 10111101 becomes 010 111 101.

• A. Two's complement only
• B. Sign and magnitude and one's complement only
• C. Two's complement and one's complement only
• D. All three representations

Explanation: In all three six-bit signed representations, 011000 represents +24, so adding it to itself gives +48, outside the representable positive…

• A. less expensive
• B. always more accurate and faster
• C. useful over wider ranges of problem types
• D. easier to maintain

Explanation: Digital computers can be programmed for a much wider variety of problems, while analog computers are usually designed around continuous…

• A. 10101.001
• B. 10100.001
• C. 10101.010
• D. 10100.111

Explanation: The integer 21 is 10101₂, and 0.125 equals 1/8, represented as 0.001₂. Combining them gives 10101.001₂.

• A. Base 10
• B. Base 16
• C. Base8
• D. Base 3

Explanation: A base-3 system permits only the digits 0, 1, and 2. Since 3 is not a valid digit in that system, 123 is invalid in base 3.

• A. it is used by everybody
• B. any logic function can be realized by NAND gates alone
• C. all the minization techniques are applicable for optimum NAND gate realization
• D. many digital computers use NAND gates

Explanation: NAND gates are universal because they can first be combined to produce NOT, AND, and OR operations, from which any Boolean logic function…

• A. floating point hardware is costly
• B. it is slower than software
• C. it is not possible to perform floating point addition by hardware
• D. of no specific reason.

Explanation: Floating-point arithmetic requires additional hardware for mantissa alignment, exponent handling, and normalization, making it relatively…

• A. Limit the maximum emitter current
• B. Provide base-emitter bias
• C. Limit the change in emitter current
• D. None of the above

Explanation: The emitter resistor provides negative feedback: an increase in emitter current raises the emitter voltage and reduces the effective…

• A. Amplifier circuits
• B. Switching circuits
• C. Rectifier circuits
• D. None of the above

Explanation: The base-resistor method gives poor bias stability because collector current depends strongly on transistor beta, so it is mainly suitable…

• A. 25
• B. 50
• C. 100
• D. 200

Explanation: With fixed base bias, the collector current is approximately I_C = βI_B, so a change in beta produces a corresponding proportional change…