All Free Electrical Engineering MCQs with Answers

Every Electrical Engineering question in the bank, across all chapters, each with the correct answer and a written explanation. Free and unlimited, with no account needed.

3,143 questions · page 96 of 158

  • A. Linear devices only
  • B. Digital devices only
  • C. Both linear and digital devices
  • D. None of the above

Explanation: IC technology is used in both linear applications, such as amplifiers, and digital applications, such as logic gates and processors.

Correct answer: Both linear and digital devices
  • A. Less space than
  • B. More space than
  • C. Same space as
  • D. None of the above

Explanation: A transistor is fabricated as a small semiconductor junction structure, whereas an inductor requires a coil or magnetic structure that…

Correct answer: Less space than
  • A. Diode
  • B. Transistor
  • C. FET
  • D. Capacitor

Explanation: Capacitors are most difficult to fabricate in an IC because useful capacitance requires relatively large chip area and carefully formed…

Correct answer: Capacitor
  • A. common source configuration
  • B. common drain configuration
  • C. common gate configuration
  • D. none of the above

Explanation: The common-base BJT and common-gate JFET both keep the input-output common terminal at AC ground.

Correct answer: common gate configuration
  • A. drain to source current
  • B. drain to source current with gate shorted
  • C. drain to source current with gate open
  • D. none of the above

Explanation: IDSS is the drain-to-source current when the gate is shorted to the source, so VGS equals zero.

Correct answer: drain to source current with gate shorted
  • A. 0 mA
  • B. ID(on)
  • C. maximum
  • D. IDSS

Explanation: A p-channel enhancement MOSFET conducts only when VGS is sufficiently negative, below its negative threshold voltage.

Correct answer: 0 mA
  • A. 20 mA
  • B. 0 mA
  • C. 40 mA
  • D. 10 mA

Explanation: A depletion MOSFET conducts at VGS = 0 V because its channel exists without gate bias.

Correct answer: 20 mA
  • A. at its widest point
  • B. completely closed by the depletion region
  • C. extremely narrow
  • D. reverse baised

Explanation: At cutoff, the reverse-biased gate junction's depletion regions extend across the channel and stop majority-carrier flow.

Correct answer: completely closed by the depletion region
  • A. +4 V
  • B. -4 V
  • C. dependent on VGS
  • D. data insufficient

Explanation: For the usual JFET convention, the pinch-off voltage Vp is the positive magnitude of the negative cutoff voltage: Vp = |VGS(off)| = 4 V.

Correct answer: +4 V
  • A. plate
  • B. cathode
  • C. grid
  • D. none of the above

Explanation: The JFET source supplies or collects charge carriers, making it analogous to the cathode of a vacuum tube.

Correct answer: cathode
  • A. gate and drain
  • B. drain and source
  • C. gate and source
  • D. input and output

Explanation: The conducting JFET channel provides the path through which drain current flows, so it lies between the drain and source terminals.

Correct answer: drain and source
  • A. pentode
  • B. tetrode
  • C. triode
  • D. diode

Explanation: A JFET has a nearly constant-current region after pinch-off, where increasing drain voltage produces little additional current.

Correct answer: pentode
  • A. three
  • B. four
  • C. five
  • D. two

Explanation: A JFET has a channel bordered by the gate on two sides, forming two gate-channel pn junctions.

Correct answer: two
  • A. cut off
  • B. VDD
  • C. VP
  • D. V

Explanation: With VGS = 0, the JFET reaches pinch-off when VDS exceeds the pinch-off voltage VP, after which the drain current is approximately…

Correct answer: VP
  • A. of power rating
  • B. the MOSFET has two gates
  • C. the JFET has a pn junction
  • D. none of the above

Explanation: A JFET controls its channel through a reverse-biased pn junction, whereas a MOSFET uses an insulated metal-oxide gate.

Correct answer: the JFET has a pn junction
  • A. 180o out of phase with the input
  • B. in phase with the input
  • C. 90o out of phase with the input
  • D. taken at the source

Explanation: In a common-source amplifier, an increase in drain current produces a larger voltage drop across the drain resistor, making the drain…

Correct answer: 180o out of phase with the input
  • A. 2.05 V
  • B. 25 V
  • C. 0.5 V
  • D. 1.89 V

Explanation: The effective drain load is 820 Ω || 10 kΩ ≈ 758 Ω, so Av ≈ gm(RD || RL) = 0.005 × 758 ≈ 3.79.

Correct answer: 1.89 V
  • A. 1
  • B. 11.4
  • C. 8.75
  • D. 3.2

Explanation: Voltage gain is the ratio of output rms voltage to input rms voltage: Av = 3.2/0.280 ≈ 11.4. Therefore option b matches the calculated gain.

Correct answer: 11.4
  • A. the voltage gain will increase
  • B. the transconductance will increase
  • C. the voltage gain will decrease
  • D. the Q-point will shift

Explanation: Removing the source bypass capacitor introduces source degeneration through the source resistor, reducing the AC voltage gain.

Correct answer: the voltage gain will decrease
  • A. increase
  • B. decrease
  • C. stay the same
  • D. be zero

Explanation: Removing the load makes the effective drain resistance larger because the external load is no longer in parallel with the drain resistor.

Correct answer: increase